Courses/Computer Science/CPSC 355.W2014/Lecture Notes/ISAIntro

Elements of the Instruction Set Architecture (ISA)

Announcements:

• Scribe Volunteers?
• Office hours: ICT 643
• Homework Releases
• SVN (first tutorial, the way to submit homework)
• Tutorials
• Readings released for semester
  • don't worry about m4 stuff in the Paul textbook
  • the K&R book is a useful reference, buy it

Talk about the approaches to designing an ISA:

• Von Nuemann architecture (i.e., the stored-program computer)
• Accumulator Machine
• Stack Machine
• Load/Store Machine

Generate the "ChalkSim" picture of an example architecture.

• ALU
• register "file"
• instruction decoder
• PC
• IR
• ACC
• stack

The rules that govern these elements basically define the ISA. What the ALU will do gives rise to the supported instructions; the supported instructions are in turn defined by the instruction format and what the model of computation is, whether registers are present and how many of them exist, what their names and semantics are, etc.

Discuss the Fetch-Decode-Execute cycle.

• top: increment PC
• fetch instruction
• decode instruction +
  • fetch operands
• execute instruction
• write back results
• check for interrupts
• goto top

Talk about difference between the ISA and the CPU in response to a question. For example, internal implementation details of CPU such as pipelining, caching, etc. are "invisible" from the semantics of program execution point of view.